short C.V. in English:

Ben Specklin

born in Mulhouse (France)

European Electronics Engineer

Experience:






Jobs:

Since Oct.'17:

Requirements Management, Configuration and Change Management. Infineon (ATV), Munich (Germany).
  • Ensured base for a successfull ASIL B project.
  • Tools used: FrameMaker (Adobe); Jama (Jama)

June '11 - Sept.'17:

digital design, verification, RTL to GDS engineer. Infineon (ATV), Munich (Germany).
  • Successfully designed and verified digital modules in several automotive IC projects.
  • Developed in only 6 weeks the digital part of a small test IC including specification, VHDL coding, simulation, synthesis, LEC, STA and GDS import to Virtuoso.
  • Developed and gave several trainings: “Perl Beginner Crash Courses”, “Simple-Synthesis”, “importing GDS”.
  • Wrote several scripts to generate automatically VHDL code from the specification XML file, ensuring high quality and saving over 1 month effort per module: Perl script for register VHDL code, Python and Mako scripts for Test-Register-Chain, Digital-Test-Bus and Module-Structure VHDL code.
  • Ensured highest quality as digital Lead for an automotive SMPS IC project.
  • Tools used: FrameMaker (Adobe); Incisive, LEC, Virtuoso (Cadence); Design-Compiler, PrimeTime (Synopsys); Questasim (Mentor); SpyGlass (Atrenta).

June '07-May '11:

Advanced Consultant. Altran, Munich (Germany).
Successfully conducted about 10 projects in IC development (Electronic Design Automation) for different departments of Infineon.

Departments:

 Automotive, EDA Flow Support, Industrial, Wireless Communication.

Topics:

 Burn-In Verification, Digital Design, Digital Verification, Full-Custom Layout, Parasitic Extraction Support, Tool Integration.

Tools used:

 Affirma-NC-Sim, Assura, Composer, Virtuoso (Cadence); StarRC-XT (Synopsys); Blastfusion, Quartz, QuickCap (Magma); Calibre, Modelsim (Mentor); SpyGlass (Atrenta).

Technologies:

 65nm Low-Power, 65nm High-Performance, 90nm Flash, Smart Power; Bipolar, CMOS.

  • Won myself all contracts thanks to experience and contacts
  • Organized internal trainings at customer site
  • Coached junior colleagues

Aug.'05-June '07:

Senior DA Engineer, DA Manager. Intel, Shannon (Ireland).
  • Design Automation for Communication and Embedded ICs.
  • Worked on a 90nm Com IC: enabled faster runtime for Physical Verification; wrote scripts to fix DRC errors; ensured quality of full-chip LVS.
  • Led the DA team (2 persons) for 9 months during the department reorganisation, kept cost within budget, gave and organised trainings, helped pass an internal IP security audit. We setup the flow for a 130nm, 1.3GHz chipset IC and supported the Silicon group until successful Tape-Out.
  • Gave science classes in Irish National Schools for Junior Achievement.

Sept.'98-July '05:

Consultant for EDA. Siemens (I&S IS), Munich (Germany).
Successfully conducted about 30 projects in IC development (Electronic Design Automation) for different customers.

Customers:

 Infineon, (D) Munich, (D) Düsseldorf, (F) Sophia-Antipolis
Micronas, (D) Munich, (D) Freiburg
Philips, (D) Hamburg
Siemens, (D) Munich

Topics:

 full-custom layout, semi-custom layout (place & route, layout verification, parasitic extraction, timing verification, formal verification), Static Timing Analyzes (STA), tool migration, library tests, synthesis support, VHDL-design, logical synthesis, functional simulation, interface full-custom / semi-custom, interface synthesis / layout, runsets for layout verification, preparation of IC-block data, design check, software test, physical synthesis, GUI programming, litho-simulation (OPC), Verilog-design.

Tools used:

 Affirma-NC-Sim, Assura, Composer, First-Encounter, PKS, Vampire, Virtuoso (Cadence); Apollo, Astro, Hercules, Planet, Star (formerly Avant!); ACS, Cossap, Design Compiler, Physical Compiler, Primetime-SI, SDC parser (Synopsys); Blastfusion (Magma); Calibre, Modelsim, QuickSim (Mentor); CVE, Infilteon (Infineon); SpyGlass (Atrenta); Tanner-LE.

  • Led 4 technical projects (12 man-months).
  • Organized and gave 15 internal trainings (10 participants each).
  • Led software development to reduce errors due to wrong IC design constraints; presented this flexible software at SNUG 02 in Paris.
  • Gave 2-days trainings (scheme programming language) for Apollo-Layouter with full satisfaction in Design Centers in Germany, France, Singapore and California.
  • Developed team of French consultants and entered French market.
  • Found contracts thanks to contacts with potential customers.
  • Wrote scripts in: Skill (Cadence), Scheme (Avant!), Perl, Tcl, Magma-Tcl, Cadence-Tcl, Python.

Apr.'97-Aug.'98:

Installation of Traffic Controllers. Siemens (ATD SV), D-Munich.
Installed hardware and software of traffic controllers for the cities of Bremerhaven, Emden, Norderstedt, Amsterdam, Liège.

Mar.'90-Mar.'97:

EDA-Support for Simulation. Siemens (ATD SV), D-Munich. R&D:
  • Introduced digital simulation for PCBs (QuickSim) and analyzed costs.
  • Developed a library for simulation models (based on schematics (RTC62421, Max693, ...), Hardware-Models (Z85C30, 81c80, 68349, ...), VHDL-Descriptions (RAMs, ROMs, Max791, ...) for Mentor-Graphics EDA software);
  • Trained and supported users for design entry, simulation and ASICs.
  • Involved in the internal "top" movement (company culture change).

Projects:

'90-'93: fire detection; 93: managed a complex EDA-upgrade; 93-96: traffic light controller; 96: road traffic processor: FPGA design (Synopsys, Xilinx); 96-97: traffic controller, in cooperation with UK.

Sept.'89-Feb.'90:

CAD-support (programming). Siemens (A4), D-Munich.
Developed a program to manage the database of the IC models.

Military service:

Sept.'88-Aug.'89:

Reserve Officer in the French Navy. Responsible for the IT of a unit.

Trainings:

March-June '88:

Last training period in the "Institut of Spoken Communication", Grenoble (France).
C-program for automatic labelling of the voice signal.

July-Aug.'87:

Hydraulic company "Sogréah", Grenoble.

July '86:

Electronic company "Thomson", Grenoble.


Qualification:

Studies:

June '88:

Graduate Engineer in Electronics and Radioelectricity. Special field: micro-electronic

'85-'88:

Electronics Engineer University: INPG: Institut National Polytechnique de Grenoble (France).

'83-'85:

Preparation classes to engineer studies, Strasbourg (France)

May '83:

German-French Leaving Certificate at the German-French School in Freiburg (Germany). Also "Grosses Latinum": German certificate for Latin

Languages:

French:

mother tongue.

German:

bilingual (30 years in Germany)

English:

excellent (2 years in Ireland)

Spanish:

good knowledge

Others:

basic knowledge in Arab, Chinese, Hindi, Japanese, Russian, Turkish

IT:

since 81:

"reasonable computer-freak"; developed many programs, databases (4D, Access) and games (Targui)

Hardware:

Mac, PC, Unix-Workstations.

Languages:

Ample, Assembler, C, Hypertalk, Perl, Python, Scheme, Skill, Tcl, Unix.

Activities:

French association in Rosenheim:France-Contact

since '17:

President

'16 - '17:

Vice-President

'08 - '16:

Member

Board games author:

'08:

"Lex Florae" board game is 19th out of 142 at the 27th annual game design contest in France.

German-French activities group:

'91-'05:

Founder. For young bilingual people. Over 100 participants. Light organization.

Association of the German-French school alumni:

'86-'11:

Co-founder, treasurer. About '0 members:
- Designation of 50 class-speakers to collect data;
- Central management of data by computer; present on internet;
- Publication of a complex directory.

Association of the INPG residence students:

'86-'88:

Treasurer, Chairman. 50 organizers. 600 students.

Dancing Club of the INPG:

'85-'88:

Founder. Leader. Created infrastructure and ensured continuation.
10 dance teachers, 100 dance pupils, all students. Financially independent.